Overview
Designing and verifying the correctness of hardware systems is a major challenge in today's hardware development landscape. In an attempt to provide best-of-breed solutions to this area, the 'System Verification Technologies' group is focusing on finding efficient ways to verify the design of full systems. Our technology and tools support a simulation-based verification of a large variety of system designs ranging from Integrated Systems On a Chip (ISOCs) to very large, high-end, computer systems.
The leading solution we develop is X-Gen, a transaction-level stimuli generator for system verification. X-Gen supports a rich request-file language for describing test cases. Through this language, users may direct the tool to generate scenarios that range from specific to completely random, guided by the encapsulated testing knowledge. X-Gen's engine is driven by a model of the target system, which defines component types and describes their repertoire of interactions. X-Gen provides a GUI for editing request files and a powerful modeling platform that allows easy introduction of new interactions and components to the system.
X-Gen is powered by the Generation Core (GEC) technology, also developed by the Verification and Services Technologies departement. The GEC technology is a powerful and generic toolbox for the development of random test generators. It captures the essence of a model-based stimuli generation framework, and provides powerful, universal constraint-solving mechanisms under a generalized object-oriented modeling scheme.
Activities
Manager
Shady Copty,
