Skip to main content

Code Optimization and Quality Technologies

Publications

  • "Measuring an Improving Latency to Avoid Test Suite Wear Out",
    Shmuel Ur, Mark Harman and Shin Yoo, SBST, Best Paper Award, April 2009.
  • "Automated Substring Hole Analysis",
    Yoram Adler, Eitan Farchi, Moshe Klausner, Dan Peleg, Orna Raz, Moran Shochat, Shmuel Ur and Aviad Zlotnick, ICSE 2009.
  • "A Concurrency Testing Tool and itsPlug-ins for Dynamic Analysis and Runtime Healing",
    Yarden Nir-Buchbinder, Zdenek Letko, Bohuslav Kerena, Rachel Tzoref-Brill, Shmuel Ur, and Tomás Vojnar, RV 2009.
  • "Advanced Code Coverage Analysis Using Substring Holes",
    Yoram Adler, Eitan Farchi, Moshe Klausner, Dan Pelleg, Orna Raz, Moran Shochat, Shmuel Ur and Aviad Zlotnick, ISSTA 2009.
  • "Cross-Entropy-Based Replay of Concurrent Programs",
    Hana Chockler, Eitan Farchi, Benny Godlin, Sergey Novikov, FASE 2009: 201-215.
  • "Forcing Small Models of Conditions on Program Interleaving for Detection of Concurrent Bugs",
    Ehud Trainin, Yarden Nir-Buchbinder, Rachel Tzoref-Brill, Aviad Zlotnick, Shmuel Ur and Eitan Farchi, PADTAD 2009.
  • "An Effective Method for Keeping Design Artifacts Up-to-Date",
    Yochai Ben-Chaim, Eitan Farchi, Orna Raz, Wikis4SE 2009.
  • "Hardware-less testing for RAS software",
    Aviad Zlotnick, Orna Raz, SYSTOR 2009: 17.
  • "Controlling Levels of False Negative and False Positive Errors via Separate Adaptive Thresholds",
    David Breitgand, Ealan Henis, Maayan Goldstein, Onn Shehory, IM 2009.
  • "Automated Collaboration among Communicating, Semiautonomous Vehicles",
    Dan Chevion, Ron Sivan, Onn Shehory, Yuval Shimony, MIMS 2009.
  • "RacingSnail: Improving Throughput via Slowdowns",
    Maayan Goldstain, Onn Shehory, Rachel Tzoref-Brill, Shmuel Ur. P3AD 2009.
  • "Proceedings of ICAC 2009",
    Book editor: Onn Shehory, IEEE, 2009.
  • "The future of software engineering and multi-agent systems",
    D. Weyns, H.V.D. Parunak and O. Shehory, International Journal of Agent-Oriented Software Engineering, Vol. 3 No. 4, pp.369–377. 2009.
  • "Lecture notes in BIP: Agent-Mediated Electronic Commerce X and Trading Agent Design and Analysis",
    O. Shehory and W. Ketter (Eds.), Springer 2009, to appear.
  • "Outer-Loop Vectorization - Revisited for Short SIMD Architectures",
    Dorit Nuzman and Ayal Zaks, PACT 2008, October 25-29, 2008, Toronto, Canada.
  • "MILEPOST GCC: machine learning based research compiler",
    Grigori Fursin et al., GCC Developers' Summit, June 17-19, 2008, Ottawa, Canada.
    (Presentation)
  • "Compiling for an Indirect Vector Register Architecture",
    Dorit Nuzman, Mircea Namolaru, Ayal Zaks, and Jeff H. Derby, Computing Frontiers, May 5-7, 2008, Ischia, Italy.
  • "Automatic Feature Generation for Setting Compilers Heuristics",
    Hugh Leather, Elad Yom-Tov, Mircea Namolaru and Ari Freund, SMART '08 (2nd Workshop on Statistical and Machine learning approaches to ARchitectures and compilaTion ), January 27, 2008, Goteborg, Sweden.
  • "Struct-reorg: current status and future perspectives",
    Olga Golovanevsky and Ayal Zaks, GCC Developers' Summit, July 18-20, 2007, Ottawa, Canada.
  • "Loop-based SLP",
    Ira Rosen, Dorit Nuzman, and Ayal Zaks, GCC Developers' Summit, July 18-20, 2007, Ottawa, Canada.
  • "New Algorithms for SIMD Alignment",
    Liza Fireman, Erez Petrank, and Ayal Zaks, CC 2007 (16th International Conference on Compiler Construction), March 26-30, 2007, Braga, Portugal. (PPT presentation.)
  • "Aggressive Function Inlining with Global Code Reordering",
    O. Boehm, D. Citron, G. Haber, M. Klausner, and R. Levin, IBM Research Report number H-0247, November, 2006.
  • "Understanding Performance of Multi-Core Systems using Trace-based Visualization",
    P. F. Sweeney, M. Haswirth, A. Diwan, M. Biberstein, and Y. Harel, First Workshop on Software Tools for Multi-Core Systems (STMCS), 2006.
  • "Matrix flattening and transposing in GCC",
    Razya Ladelsky, GCC Developers' Summit, June 28-30, 2006, Ottawa, Canada.
  • "Autovectorization in GCC two years later",
    Dorit Nuzman and Ayal Zaks, GCC Developers' Summit, June 28-30, 2006, Ottawa, Canada.
  • "Devirtualization in GCC",
    Mircea Namolaru, GCC Developers' Summit, June 28-30, 2006, Ottawa, Canada.
  • "Auto-Vectorization of Interleaved Data for SIMD",
    Dorit Nuzman, Ira Rosen, and Ayal Zaks, PLDI, June 12-14, 2006, Ottawa, Canada, 132-143. (PPT presentation.)
  • "Exploiting the AltiVec Unit for Commercial Applications",
    Daniel Citron, Hiroshi Inoue, Takao Moriyama, Motohiro Kawahito, Hideaki Komatsu, and Toshio Nakatani, CAECW-9 (9th workshop on Computer Architecture Evaluation using Commercial Workloads), Feb 12, 2006, Austin, Texas.
  • "Multi-platform Auto-vectorization",
    Dorit Nuzman and Richard Henderson, CGO-4 (The 4th Annual International Symposium on Code Generation and Optimization), March 26-29, 2006, Manhattan, New York, 281-294.
  • "Computing the minimum DNF representation of Boolean functions defined by intervals",
    Baruch Schieber, Danny Geist and Ayal Zaks, Discrete Applied Mathematics, Volume 149, Issues 1-3, 1 August 2005, Pages 154-173. See also IBM Technical Report RC23335 (W0409-058) September 10, 2004.
  • "Auto-Vectorization of Interleaved Data for SIMD",
    Dorit Nuzman, Ira Rosen and Ayal Zaks, IBM Research Report H-0235, 2005.
  • "Contributions to the GNU Compiler Collection GCC",
    David Edelsohn et al, IBM Systems Journal issue on Open Source, volume 44, number 2 May 2005, pp 259-278.
  • "Interprocedural Constant Propagation and Method Versioning in GCC",
    Razya Ladelsky and Mircea Namolaru, The 2005 GCC Developers Summit (http://www.gccsummit.org/2005/), pp 133-143.
  • "Cache Aware Data Layout Reorganization Optimization in GCC",
    Mostafa Hagog and Caroline Tice, The 2005 GCC Developers Summit (http://www.gccsummit.org/2005/), pp 69-92.
  • "Instrumenting Annotated Programs",
    M. Biberstein, V. Sreedhar, B. Mendelson, D. Citron, and A. Giammaria, First ACM/USENIX Conference on Virtual Execution Environments (VEE'05).
  • "Autovectorization in GCC",
    Dorit Naishlos, The 2004 GCC Developers Summit (http://www.gccsummit.org/2004/) pp 105-118.
  • "TCP/IP checksum vectorization using AltiVec",
    Ayal Zaks, Daniel Citron and Dorit Naishlos, IBM developerWorks, 26 Oct 2004.
  • "Swing Modulo Scheduling in GCC",
    Mostafa Hagog and Ayal Zaks, The 2004 GCC Developers Summit (http://www.gccsummit.org/2004/), pp 55-64.
  • "Reducing program image size by extracting frozen code and data",
    Daniel Citron, Gadi Haber, and Roy Levin, Proceedings of the 4th ACM International Conference on Embedded Software, Pisa Italy, September, 2004.
  • "Fidgeting to the Point of No Return. Parallel and Distributed Systems: Testing and Debugging (PADTAD) 2004",
    M. Biberstein, E. Farchi, and S. Ur, In proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004).
  • "MisSPECulation: Partial and Misleading Use of SPEC CPU2000 in Computer Architecture Conferences",
    D. Citron, Proceedings of the 30th International Symposium on Computer Architecture, pp. 52-59, June 2003.
  • "An innovative low-power high-performance programmable signal processor for digital communications",
    J.H. Moreno, V. Zyuban, U. Shvadron, F. Neeser, J. Derby, M. Ware, K. Kailas, A. Zaks, A. Geva, S. Ben-David, S. Asaad, T. Fox, M. Biberstein, D. Naishlos, and H. Hunter, IBM Journal of Research and Development Vol 47, No 2/3, 2003.
  • "Choosing Among Alternative Pasts",
    M. Biberstein, E. Farchi, and S. Ur, PADTAD'2003.
  • "Vectorizing for SIMdD DSP Architecture",
    D. Naishlos, M. Biberstein, S. Ben-David and A. Zaks, CASES'2003.
  • "Optimization Opportunities Created by Global Data Reordering",
    G. Haber, M. Klausner, V. Eisenberg, B. Mendelson, M. Gurevich, First International Symposium on Code Generation and Optimization (CGO'2003), San Francisco, California, pp. 228-241, March, 2003.
  • "An innovative low-power high-perfomance programmable signal processor for digital communications",
    J.H. Moreno et al, IBM Journal of Research and Development, Volume 47, Number 2/3, March/May 2003, pp. 299-326.
  • "Compiler Vectorization Techniques for a Disjoint SIMD Architecture",
    Dorit Naishlos, Marina Biberstein and Ayal Zaks, IBM Research Report H-0146 November 17, 2002.
  • "Compiler Vectorization Techniques for a disjoint SIMD Architecture",
    D. Naishlos, M. Biberstein, and A. Zaks, IBM Research Report, H-0146 Novermber 17, 2002.
  • "Revisiting Instruction Level Reuse",
    D. Citron, and D. G. Feitelson, Proceedings of WDDD 2002 Workshop on Duplicating, Deconstructing, and Debunking, June 2002.
  • "Saber: Performance Optimization and Enforcement of J2EE Best Practices",
    L. Koved, D. Reimer, D. W. Coleman, R. D. Johnson, A. Kershenbaum, G. Leeman, M. Pistoia, V. Sarkar, K. Srinivas, S. Porat, T. Cohen, V. Feldman, M. Biberstein, M. Hogstrom, C. Norton, T. Francis, and S. Rich, presented at Performance Engineering 'Best Practices' Topical Conference III, sponsored by the IBM Academy of Technology 2002.
  • "A case for sealing classes in Java",
    M. Biberstein, V. C. Sreedhar and A. Zaks, Israeli Workshop on Programming Languages & Development Environments 2002.
  • "Light Weight Optimization for Reducing Hot Saves and Restores of Callee-Saved Registers",
    G. Haber, M. Klausner, B. Mendelson and V. Eisenberg, Fourth Workshop on Feedback-Directed and Dynamic Optimization (FDDO'2001), Austin Texas, December 2, 2001.
  • "Sealing, encapsulation, and immutability",
    M. Biberstein, Y. Gil, and S. Porat, ECOOP'2001.
  • "Low Power Instruction Memoization",
    D. Citron, and D. G. Feitelson, Kool-Chips Workshop in Conjunction with MICRO 33, December 2000.
  • "Reliable Post-link Optimizations Based on Partial Information",
    G. Haber, E. A. Henis and V. Eisenberg, Third Workshop on Feedback-Directed and Dynamic Optimization (FDDO'2000), Monterey California, December 2000.
  • "Reliable Post-link Optimizations based on Partial Information subsystems",
    Gadi Haber, Ealan Henis and Vadim Eisenberg, Proc.Feedback Directed Optimizations 3 Workshop, Dec. 2000.
  • "Minimizing Inter-File Transfers in Architectures with Separate Address Registers",
    Mayan Moudgill and Ayal Zaks, IBM Research Report RC 21884 (98461) 16 Nov. 2000.
  • "Sealed Calls in Java Packages",
    Ayal Zaks, Vitaly Feldman and Nava Aizikowitz, OOPSLA 2000, Annual ACM SIGPLAN Conference on Object-Oriented Programming Systems, Languages and Applications (OOPSLA), Minneapolis, Minnesota, Oct. 2000, pp. 83-92.
  • "Automatic Detection of Immutable Fields in Java",
    M Biberstein, L. Koved and B. Medelson, CASCON'2000.
  • "Sealed Called in Java Packages",
    Ayal Zaks, Vitaly Feldman and Nava Aizikowitz, OOPSLA'2000.
  • "FDPR - A post-link optimization tool for large subsystems",
    Ealan A. Henis, Gadi Haber, Moshe Klausner and Alex Warshavsky, Proc.Feedback Directed Optimizations 2 Workshop, Oct. 1999.
  • "Profile-directed Restructuring of Operating System Code",
    W. J. Schmidt, R.R. Roediger, C.S. Mestad, B. Mendelson, I. Shavit-Lottem, and V. Bortnikov-Sitnitsky, IBM Systems Journal, 37, No. 2, pp. 270-297, 1998.
  • "Sharpening Global Static Analysis to Cope with Java",
    Sara Porat, Bilha Mendelson, and Irina Shapira, Proceedings of CASCON '98 pp. 303-316.
  • "Profile-directed restructuring of operating system code",
    W. J. Schmidt, R. R. Roediger, C. S. Mestad, B. Mendelson, I. Shavit-Lottem and V. Bortnikov-Sitnitsky, IBM Systems Journal, 37(2), p. 270-297, 1998.
  • "Compiler Optimization of C++ Virtual Function Calls",
    Sara Porat, David Bernstein, Yaroslav Fedorov, Joseph Rodrigue and Eran Yahav, 2nd Conference on Object-Oriented Technologies & Systems (COOTS), June 17--21, 1996. Toronto, Canada, pp. 3-14, USENIX, June 1996.
  • "FDPR - A Post-Pass Object Code Optimization Tool",
    I. Nahshon and D. Bernstein, Proc. Poster Session of the International Conference on Compiler Construction, pp. 97-104, April 1996.
  • "Compiler Techniques for Data Fetching on the PowerPC",
    David Bernstein, Doren Cohen, Ari Freund and Dror E. Maydan, Proceedings of the IFIP WG 10.3 Working Conference on Parallel Architectures and Compilation Techniques PACT '95", pp. 19-26, ACM Press, June 27-29, 1995.
  • "Class assertions in C++",
    Sara Porat and Paul Fertig, Journal of Object-Oriented Programming, 8(2), pp. 30-37, May 1995.
  • "Solutions and Debugging for Data Consistency in Multiprocessors with Noncoherent Caches",
    David Bernstein, Mauricio Breternitz Jr., Ahmed M. Gheith and Bilha Mendelson, International Journal of Parallel Programming, 23(1), pp. 83-103, February 1995.
  • "Dynamic Memory Disambiguation for Array References",
    David Bernstein, Doron Cohen and Dror E. Maydan, Proceedings of the 27th Annual International Symposium on Microarchitecture, pp. 105-111, November 30- dec 2, 1994.
  • "Adding class assertions to C++",
    Sara Porat and Paul Fertig, 1993.
  • "Performance Evaluation of Instruction Scheduling on the IBM RISC System/6000",
    D. Bernstein, D. Cohen, Y. Lavon and V. Rainish, Proceedings of the 25th Annual International Symposium on Microarchitecture, pp. 226-235, IEEE Computer Society Press, December 1992.
  • "Proving Safety of Speculative Load Instructions at Compile Time",
    David Bernstein, Michael Rodeh and Shmuel Sagiv, ESOP'92, 4th European Symposium on Programming, Lecture Notes in Computer Science, Vol. 582, pp. 56-72, Springer, 26-28 February 1992.
  • "Code Duplication: An Assist for Global Instruction Scheduling",
    David Bernstein, Doron Cohen and Hugo Krawczyk, Proceedings of the 24th Annual International Symposium on Microarchitecture, pp. 103-113, November 18-20, 1991.
  • "The parallel C (pC) programming language",
    R. Canetti, L. P. Fertig, S. A. Kravitz, D. Malki, R. Y. Pinter, S. Porat and A.Teperman, IBM Journal of Research and Development, Vol. 35, Number 5/6, pp. 727-741, September /nov 1991.
  • "Global Instruction Scheduling for Superscalar Machines",
    David Bernstein and Michael Rodeh, Proceedings of the ACM SIGPLAN '91 Conference on Programming Language Design and Implementation, pp. 241-255, ACM Press, June 1991.
  • "Scheduling arithmetic and load operations in parallel with no spilling",
    David Bernstein, Jeffrey M. Jaffe and Michael Rodeh, SIAM Journal on Computing, 18(6), pp. 1098-1127, December 1989.
  • "Spill Code Minimization Techniques for Optimizing Compilers",
    D. Bernstein, M. Golumbic, Y. Mansour, A. Pinter, D. Goldin, H. Krawcryk and I. Nahshon, Proceedings of the SIGPLAN '89 Conference on Programming Language Design and Implementation (SIGPLAN '89), pp. 258-263, ACM Press, June 1989.
  • "Approximation Algorithms for Scheduling Arithmetic Expressions on Pipelined Machines",
    David Bernstein, Michael Rodeh and Izidor Gertner, Journal of Algorithms, 10(1), pp. 120-139, March 1989.